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www.irf.com ? 2007 international rectifier october 18, 2010 irs2092 protected digital audio amplifier features ? integrated analog input class d audio amplifier driver in a small 16 pin package ? floating inputs enable easy half bridge implementation ? programmable bidirectional over-current protection with self-reset function ? programmable preset deadtime for improved thd performances ? start and stop click noise reduction ? high noise immunity ? 100 v ratings deliver up to 500 w in output power ? operates up to 800 khz ? rohs compliant typical applications ? home theater systems ? mini component stereo systems ? powered speaker systems ? general purpose audio power amplifiers product summary v offset (max) 100 v io+ 1.0 a gate driver io - 1.2 a selectable deadtime 25/40/65/105 ns oc protection delay (max) 500 ns dc offset <20 mv pwm frequency ~800 khz error amplifier open loop gain >60 db thd+n* (1khz, 50w, 4 ? ) 0.01 % residual noise* (aes-17 filter) 200 vrms * measured with recommended circuit package options soic16n pdip16 typical connection diagram irs2092 12v vaa gnd in- ocset com comp vss lo vcc vref ho vs csd csh vb input -b vcc +b speaker dt 2 16 1 4 3 5 6 7 8 15 14 13 12 11 10 9
irs2092 www.irf.com ? 2007 international rectifier 2 table of contents page description 3 simplified block diagram 4 typical application diagram 4 qualification information 5 absolute maximum ratings 6 recommended operating conditions 7 electrical characteristics 8 waveform definitions 10 functional block diagram 11 input/output pin equivalent circuit diagram 12 lead definitions 13 lead assignments 13 package details 14 tape and reel details 16 part marking information 17 ordering information 18
irs2092 www.irf.com ? 2007 international rectifier 3 description the irs2092 is a high voltage, high performance class d audio amplifier driver with pwm modulator and protection. in conjunction with two external mosfet and a few exter nal components, a complete class d audio amplifier with protection can be realized. international rectifier?s proprietary noise isolation technology allows high current gate drive stage and high speed low noise error amplifier reside on a single small silicon die. open elements of pwm modulator section a llow flexible pwm topology implementation.
irs2092 www.irf.com ? 2007 international rectifier 4 simplified block diagram typical application diagram 1 k ? 4.7 ? refer to iraudamp5 reference design for details.
irs2092 www.irf.com ? 2007 international rectifier 5 qualification information ? industrial ?? (per jedec jesd 47e) qualification level comments: this ic has passed jedec?s industrial qualification. ir?s consumer qualification level is granted by extension of the higher industrial level. soic16n msl2 ??? (per ipc/jedec j-std-020c) moisture sensitivity level dip16 not applicable machine model class b (per jedec standard jesd22-a114d) human body model class 2 (per eia/jedec standard eia/jesd22-a115-a) esd charged device model class iv (per jedec standard jesd22-c101c) ic latch-up test class i, level a (per jesd78a) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales repr esentative for further information. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales repr esentative for further information.
irs2092 www.irf.com ? 2007 international rectifier 6 absolute maximum ratings absolute maximum ratings indicate sustained limit s beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to co m; all currents are defined positive into any lead. the thermal resistance and power dissipation ra tings are measured under board mounted and still air conditions. symbol definition min max units v b high side floating supply voltage -0.3 220 v s high side floating supply voltage (note2) v b -20 v b +0.3 v ho high side floating output voltage v s -0.3 v b +0.3 v csh csh pin input voltage v s -0.3 v b +0.3 v cc low side fixed supply voltage (note2) -0.3 20 v lo low side output voltage -0.3 vcc+0.3 v aa floating input positive supply voltage (note2) (see i aaz ) 210 v ss floating input negative supply voltage (note2) -1 (see i ssz ) gnd +0.3 v gnd floating input supply ground voltage v ss -0.3 (see i ssz ) v aa +0.3 (see i aaz ) v i in- inverting input current (note1) --- 3 ma v csd sd pin input voltage v ss -0.3 v aa +0.3 v comp comp pin input voltage v ss -0.3 v aa +0.3 v dt dt pin input voltage -0.3 v cc +0.3 v ocset ocset pin input voltage -0.3 v cc +0.3 v i aaz floating input positive supply z ener clamp current (note2) --- 20 i ssz floating input negative supply z ener clamp current (note2) --- 20 i ccz low side supply zener clamp current (note3) --- 10 i bsz floating supply zener clamp current (note3) --- 10 i oref reference output current --- 5 ma dv s /dt allowable vs voltage slew rate --- 50 v/ns dv ss /dt allowable vss voltage slew rate (note3) --- 50 v/ms soic16n --- 1.0 pd maximum power dissipation @ t a +25 c dip16 --- 1.6 w soic16n --- 115 rth ja thermal resistance, junction to ambient dip16 --- 75 c/w t j junction temperature --- 150 c t s storage temperature -55 150 c t l lead temperature (soldering, 10 seconds) --- 300 c note1: in- contains clamping diode to gnd. note2: v dd ? in+, gnd -v ss , v cc -com and v b -v s contain internal shunt zener diodes. please note that the voltage ratings of these can be limited by the clamping current. note3: for the rising and falling edges of step signal of 10 v. v ss =15 v to 200 v.
irs2092 www.irf.com ? 2007 international rectifier 7 recommended operating conditions for proper operation, the devic e should be used within the recommended conditions below. the vs and com offset ratings are tested with supplies biased at v aa -v ss =10 v, v cc =12 v and v b -v s =12 v. all voltage paramet ers are absolute voltages referenced to com; all currents are defined positive into any lead. symbol definition min. max. units v b high side floating supply absolute voltage v s +10 v s +18 v s high side floating supply offset voltage (note 1) 200 v i aaz floating input positive supply zener clamp current 1 11 i ssz floating input negative supply zener clamp current 1 11 ma v ss floating input supply absolute voltage 0 200 v ho high side floating output voltage vs v b v cc low side fixed supply voltage 10 18 v lo low side output voltage 0 v cc v gnd gnd pin input voltage v ss (note 3) v aa (note 3) v in- inverting input voltage v gnd -0.5 v gnd +0.5 v csd csd pin input voltage v ss v aa v comp comp pin input voltage v ss v aa v c comp comp pin phase compensation capacitor to gnd 1 - nf v dt dt pin input voltage 0 v cc v i oref reference output current to com (note 2) 0.3 0.8 ma v ocset ocset pin input voltage 0.5 5 v csh csh pin input voltage vs v b v dvss/dt allowable vss voltage slew rate upon power-up (note4) - 50 v/ms i pw input pulse width 10 (note 5) - ns f sw switching frequency - 800 khz t a ambient temperature -40 125 c note 1: logic operational for vs equal to ?5 v to +200 v. logic state held for vs equal to ?5 v to ?v bs . note 2: nominal voltage for v ref is 5.1 v. i oref of 0.3 ? 0.8 ma dictates total exter nal resistor value on vref to be 6.3 k ? to 16.7 k ? . note 3: gnd input voltage is limited by i aaz and i ssz . note 4: v ss ramps up from 0 v to 200 v. note 5: output logic status may not respond correctly if input pulse width is smaller than the minimum pulse width.
irs2092 www.irf.com ? 2007 international rectifier 8 electrical characteristics v cc ,v bs = 12 v, v ss =v s =com=0 v, v aa =10 v, c l =1 nf and t a =25 c unless otherwise specified. symbol definition min typ max units test conditions low side supply uv cc+ vcc supply uvlo positive threshold 8.4 8.9 9.4 uv cc- vcc supply uvlo negative threshold 8.2 8.7 9.2 uv cchys uv cc hysteresis - 0.2 - v i qcc low side quiescent current - - 3 ma v dt =v cc v clampl low side zener diode clam p voltage 19.6 20.4 21.6 v i cc =5 ma high side floating supply uv bs+ high side well uvlo positiv e threshold 8.0 8.5 9.0 uv bs- high side well uvlo negative threshold 7.8 8.3 8.8 uv bshys uv bs hysteresis - 0.2 - v i qbs high side quiescent current - - 1 ma i lkh high to low side leakage current - - 50 a v b =v s =200 v v clamph high side zener diode clam p voltage 19.6 20.4 21.6 v i bs =5 ma floating input supply uv aa+ va+, va- floating supply uvlo positive threshold from v ss 8.2 8.7 9.2 v ss =0 v, gnd pin floating uv aa- va+, va- floating supply uvlo negative threshold from v ss 7.7 8.2 8.7 v ss =0 v, gnd pin floating uv aahys uv aa hysteresis - 0.5 - v v ss =0 v, gnd pin floating i qaa0 floating input positiv e quiescent supply current - 0.5 2 v aa =10 v, v ss =0 v, v csd =vss i qaa1 floating input positiv e quiescent supply current - 8 11 v aa =10 v, v ss =0 v, v csd =vaa i qaa2 floating input positiv e quiescent supply current - 8 11 ma v aa =10 v, v ss =0 v, v csd =gnd i lkm floating input side to low side leakage current - - 50 a v aa =v ss =v gnd = 100 v v clampm+ v aa floating supply zener diode clamp voltage, positive, with respect to gnd 6.0 7.0 8.0 i aa =5 ma, i ss =5 ma, v gnd =0 v, v csd =vss v clampm- v ss floating supply zener diode clamp voltage, negative, with respect to gnd -8.0 -7.0 -6.0 v i aa =5 ma, i ss =5 ma, v gnd =0 v, v csd =vss audio input (v gnd =0, v aa =5v, v ss =-5v) v os input offset voltage -15 0 15 mv i bin input bias current - - 40 na bw small signal bandwidth - 9 - mhz c comp =2 nf, rf=3.3 k ? v comp ota output voltage vaa-1 - vss+1 v g m ota transconductance - 100 - ms v in- =10 mv g v ota gain 60 - - db v nrms ota input noise voltage - 250 - mvrms bw=20 khz, resolution bw=22 hz fig.5 sr slew rate - 5 - v/us c comp =1 nf cmrr common-mode rejection ratio - 60 - psrr supply voltage rejection ratio - 65 - db pwm comparator vth pwm pwm comparator threshold in comp - (v aa -v ss )/2 - v f ota comp pin star-up local o scillation 0.7 1.0 1.5 mhz v csd =gnd
irs2092 www.irf.com ? 2007 international rectifier 9 frequency protection v ref reference output vo ltage 4.8 5.1 5.4 i oref =0.5 ma vth ocl low side oc threshold in vs 1.1 1.2 1.3 ocset=1.2 v, fig.6 vth och high side oc threshold in v csh 1.1+ vs 1.2+ vs 1.3+ vs vs=200 v, vth1 csd pin shutdown release threshold 0.62xv aa 0.70xv aa 0.78xv aa vth2 csd pin self reset threshold 0.26xv aa 0.30xv aa 0.34xv aa v i csd+ csd pin discharge current 70 100 130 v csd = v ss +5 v i csd- csd pin charge current 70 100 130 a v csd = v ss +5 v t sd shutdown propagation delay from v csd > v ss + vth och to shutdown - - 250 t och propagation delay time from v csh > vth och to shutdown - - 500 fig.3 t ocl propagation delay time from vs> vth ocl to shutdown - - 500 ns fig.4 gate driver io+ output high short circuit current (source) - 1.0 - a vo=0 v, pw< 10 s io- output low short circuit current (sink) - 1.2 - a vo=12 v, pw< 10 s v ol low level out put voltage lo ? com, ho - vs - - 0.1 v oh high level out put voltage vcc ? lo, vb - ho - - 1.4 v io=0 a ton high and low side turn-on propagation delay - 360 - v dt = v cc toff high and low side turn-off propagation delay - 335 - v dt = v cc tr turn-on rise time - 20 50 tf turn-off fall time - 15 35 dt1 deadtime: lo turn-off to ho turn-on (dt lo-ho ) & ho turn-off to lo turn-on (dt ho-lo ) 15 25 35 v dt >v dt1, dt2 deadtime: lo turn-off to ho turn-on (dt lo-ho ) & ho turn-off to lo turn-on (dt ho-lo ) 25 40 55 v dt1 >v dt > v dt2, dt3 deadtime: lo turn-off to ho turn-on (dt lo-ho ) & ho turn-off to lo turn-on (dt ho-lo ) 50 65 85 v dt2 >v dt > v dt3, dt4 deadtime: lo turn-off to ho turn-on (dt lo-ho ) & ho turn-off to lo turn-on (dt ho-lo )v dt = v dt4 85 105 135 ns v dt3 >v dt > v dt4, v dt1 dt mode select threshold 2 0.51xvcc 0.57xvcc 0.63xvcc v dt2 dt mode select threshold 3 0.32xvcc 0.36xvcc 0.40xvcc v dt3 dt mode select threshold 4 0.21xvcc 0.23xvcc 0.25xvcc v
irs2092 www.irf.com ? 2007 international rectifier 10 waveform definitions vth1 t sd 90% csd ho/lo figure 1: switching time waveform definitions figure 2: csd to shutdown waveform definitions vth ocl t ocl 90% vs lo vth och t och 90% csh ho vs figure 3: v s > vth ocl to shutdown waveform figure 4: v csh > vth och to shutdown waveform figure 5: ota input noise voltage mesurent circuit
irs2092 www.irf.com ? 2007 international rectifier 11 functional block diagram: irs2092 high side cs vb ho vs in- low side cs csd uv q uv detect dead time vcc lo com vaa gnd comp vss ` csh protection control sd vref uv detect uv detect charge/ discharge hv level shift hv level shift hv level shift floating input floating high side hv level shift hv level shift 5v reg ocset dt dt ota ` vaa+vss 2 comp pwm modulator click noise ellimination
irs2092 www.irf.com ? 2007 international rectifier 12 input/output pin equivalent circuit diagrams: irs2092 esd diode esd diode v b ho v s esd diode esd diode lo com 200 v 20 v clamp 20 v clamp v cc v cc esd diode esd diode vaa comp or csd vss esd diode esd diode v cc dt, vref or ocset com
irs2092 www.irf.com ? 2007 international rectifier 13 lead definitions: irs2092 pin # symbol description 1 vaa floating input positive supply 2 gnd floating input supply return 3 in- analog inverting input 4 comp phase compensation input, comparator input 5 csd shutdown timing capacitor 6 vss floating input negative supply 7 vref 5v reference voltage to program ocset pin 8 ocset low side over current threshold setting 9 dt deadtime program input 10 com low side supply return 11 lo low side output 12 vcc low side supply 13 vs high side floating supply return 14 ho high side output 15 vb high side floating supply 16 csh high side over current sensing input lead assignments vaa gnd in- ocset com comp csd lo vcc vref ho vs vss 1 2 3 4 5 6 7 8 csh 16 15 14 13 12 11 10 9 vb irs2092 dt pdip16 and soic16n
irs2092 www.irf.com ? 2007 international rectifier 14 package details: pdip16
irs2092 www.irf.com ? 2007 international rectifier 15 package details: soic16n
irs2092 www.irf.com ? 2007 international rectifier 16 tape and reel details: soic16n carrier tape dimension for 16soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 15.70 16.30 0.618 0.641 d 7.40 7.60 0.291 0.299 e 6.40 6.60 0.252 0.260 f 10.20 10.40 0.402 0.409 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 reel dimensions for 16soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 22.40 n/a 0.881 g 18.50 21.10 0.728 0.830 h 16.40 18.40 0.645 0.724 metric imperial metric imperial e f a c d g a b h n ote : controlling dimension in mm loaded tape feed direction a h f e g d b c
irs2092 www.irf.com ? 2007 international rectifier 17 part marking information
irs2092 www.irf.com ? 2007 international rectifier 18 ordering information standard pack base part number package type form quantity complete part number pdip16 tube/bulk 25 irs2092pbf tube/bulk 45 irs2092spbf irs2092 soic16n tape and reel 2500 irs2092strpbf the information provided in this document is believed to be accu rate and reliable. however, international rectifier assumes no responsibility for the consequences of the use of this inform ation. international rectifier assumes no responsibility for any infringement of pat ents or of other rights of third parties which may result from the use of this in formation. no license is granted by implication or otherwise u nder any patent or patent rights of international rectifier. the specifications mentioned in this doc ument are subject to change without notice. this document supersedes and replaces all inform ation previously supplied. for technical support, please contact ir?s technical assistance center http://www.irf.com/technical-info/ world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105

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